Refereed Conferences - Full Papers

  1. “Low-Voltage Tunable Double-Gate MOSFET Transconductor for VHF/UHF Continuous-Time Filters”, H F A Hamed, S Kaya, 19th IEEE Int. Conf. on Microelectronics - ICM’07 29-31 December 2007, Cairo Egypt.
  2. “Low Voltage Programmable Double-Gate MOSFETs Current Mirror and its As Programmable-Gain Current Amplifier”, H F A Hamed, S Kaya, 14th IEEE Int. Conference on Electronics, Circuits and Systems - ICECS’07, 11-14 December, 2007, Marrakech, Morocco.
  3. “Models, Electrostatics and Molecular Dynamics of the Na+/K+-ATPase”, J F Fonseca, R F Rakowski and S Kaya, Ohio Collaborative Conference on Bioinformatics – OCCBIO 2006, 28-30 Jun 2006, Athens, OH, USA. http://www.occbio.org
  4. “A Novel Single-Gated Strained CMOS Architecture: COSMOS”, A Al-Ahmadi and S Kaya, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 1-3 Sep 2005, Tokyo, Japan.
  5. “Study of RF Performance for Graded-Channel SOI MOSFETs”, W Ma and S Kaya, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 1-2 Sep 2005, Tokyo, Japan.
  6. “Scaling of RF Linearity in DG and SOI MOSFETs”, W Ma, S Kaya, and A Asenov, 11th IEEE Int. Symposium on Electron Devices for Microwave and Optoelectronic Applications – EDMO, 17-18 Nov 2003, Orlando, FL, USA.
  7. “Enhanced Velocity Overshoot and Transconductance in Si/Si0.64Ge0.36/Si p-MOSFETs - Predictions for Deep Submicron Devices”, M Palmer, G Braithwaite, M J prest, T E Whall, E H C Parker, Y P Zhao, S Kaya, J R Watling, A Asenov, J R Barker,A Waite and A G R Evans , Proc. of 31st European Solid-state Device Research Conference – ESSDERC, 11-13 Sep 2001, Nunberg, Germany.
  8. “Analysis of Statistical Fluctuations due to Line Edge Roughness in sub-0.1mm MOSFETs”, S Kaya, A R Brown, A Asenov, D Magot and T Linton, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 5-8 Sep 2001, Athens, Greece.
  9. “Single stage amplifiers on a CMOS grade silicon substrate using a polymer interlayer dielectric with strained silicon MOSFETs” G Ternent, D L Edgar, E H McLelland, F Williamson, N Ferguson, S Kaya, C D W Wilkinson, I G Thayne, K Fobelets, J Hampson, Asia-Pacific Microwave Conference, p.767, 3-6 Dec 2000, Sydney, Australia.
  10. “Indication of Non-equilibrium Transport in SiGe p-MOSFETs” Y P Zhao, S Kaya, J R Watling, A Asenov, J R Barker, M Palmer, G Braithwaite, T E Whall, E H C Parker, A Waite and A G R Evans, Proc. of 30th European Solid-state Device Research Conference - ESSDERC, p.224, 11-13 Sep 2000, Cork, Ireland.
  11. “Metal Gate Strained Silicon SiGe MOSFETs for Microwave Integrated Circuits”, G Ternent, D L Edgar, H McLelland, S Ferguson, S Kaya, C D W Wilkinson and I G Thayne 8th IEEE Int. Symposium on Electron Devices for Microwave and Optoelectronic Applications – EDMO, 13-14 Nov 2000, Glasgow, Scotland.
  12. “Effect of Oxide Interface Roughness on the Threshold Voltage Fluctuations in Decanano MOSFETs with Ultrathin Gate Oxides” A Asenov and S Kaya, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 5-8 Sep 2000, Seattle, USA.
  13. “RF Analysis Methodology for Si and SiGe FETs Based on Transient Monte Carlo Simulation”, S Roy, S Kaya, A Asenov and J R Barker, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 6-8 Sep 1999, Kyoto, Japan. 

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