Conferences

FULL PAPERS IN CONFERENCE PROCEEDINGS

  1. “Flexible Multi-Modal Capacitive Sensors with Polyurethane Foam Dielectrics for Wearables”, A. Rohit and Kaya, IEEE International Flexible Electronics Technology Conference, IFETC’2021, Columbus, OH, 8-11 Aug 2021
  2. “Vital Sign Monitoring via Flexible Capacitive Sensors: A Comparative Study”, A. Rohit, T.F. Canan and Kaya, IEEE International Flexible Electronics Technology Conference, IFETC’2021, Columbus, OH, 8-11 Aug 2021
  3. “A 60 GHz High Gain Narrow-Band 150 nm InGaAs based Power Amplifier”, S Laha and S Kaya,  IEEE 21st  Wireless and Microwave Technology Conference (WAMICON), Sand Key, FL, USA, pp.1-4, 28-29 Apr 2021.
  4. “Ultra-Flexible and Durable Textile Capacitors with Piezoelectric PVDF Dielectrics for Wearables” A. Rohit, Y. Kelestemur, and Kaya, IEEE FLEPS, Virtual Event, Manchester, England, UK, 16-19 Aug 2020
  5. “Reconfigurable Gates with Sub-10nm Ambipolar SB-FinFETs for Logic Locking & Obfuscation”, T.F. Canan, S Kaya, H Chenji, A Karanth, IEEE 63rd MWSCAS, pp. 953–956, Virtual Event, Springfield, MA, USA, 9-12 Aug 2020
  6. “Development of Capacitive Wearable Patches and Bands for Data Fusion in Complex Physical Activities”, A. Rohit, Y. Kelestemur, J. C. Runyon, and Kaya, IEEE IFETC’2019, Vancouver, BC, Canada, 11-14 Aug 2019
  7. “Laser Scribed Carbon Layers: Process Optimization & Sensor Applications”, T. Cai, Kaya, and W. Jadwisienczak, IEEE IFETC’2019, Vancouver, BC, Canada, 11-14 Aug 2019
  8. “Wearable Capacitive Patches for Data Fusion in Biomedical Monitoring & Physical Activity,” A. Rohit, Y. Kelestemur, J. C. Runyon, and Kaya, IEEE 62nd MWSCAS, pp. 37–40, Dallas, USA, 3-7 Aug 2019
  9. “Chemico-Capacitive Sensing via Dielectric Loading,” P. Rajan, Kaya, J. Wright, A. Rohit, T. Cai, and P. Hanlon, IEEE 62nd MWSCAS, pp. 1187–1190, Dallas, USA, 3-7 Aug 2019
  10. “A Compact Continuous non-Invasive Glucose Monitoring System with Phase-Sensitive Front End.” S. Laha, S Kaya, N Dhinagar, Y Kelestemur, and V Puri, 2018 IEEE Biomedical Circuits and Systems Conference (BioCAS), pp. 1-4. IEEE, 2018.
  11. ”10T and 8T Full Adders Based on Ambipolar XOR Gates with SB-FinFETs”, T F Canan, S Kaya, A Kodi, H Xin and A Louri, 25th Int. Conference on Electronic Circuits and Systems – ICECS’25, Bordeux, France, 9-12 Dec 2018.
  12. ”Sub-THz Tunable Push-Push Oscillators with FinFETs for Wireless NoCs”, Y Kelestemur, S Laha, S Kaya, A Kodi, H Xin and A Louri, Int. 57th Midwest Symposium on Circuits and Systems – MWSCAS’57, Windsor, Canada, pp.100-103, 5-8 Aug 2018.
  13. “Scalable Power-Efficient Kilo-Core Photonic-Wireless NoC Architectures”, A Kodi, K Shifflet, S Kaya, S Laha, A Louri, IEEE International Parallel and Distributed Processing Symposium (IPDPS), Vancouver, Canada, p.1010-1019, 21-25 May 2018,
  14. “Using AFM to Study the Interaction Between Recycled Asphalt Materials and Virgin Asphalt Binders”, M D Nazzal, E Holcombe, S S Kim, A Abbas, S Kaya, Transportation Research Board 97th Annual Meeting, Washington DC, 7-11 Jan 2018.
  15. ”Ultra-Compact sub-10nm Logic Circuits Based on Ambipolar SB-FinFETs”, T F Canan, S Kaya, A Kodi, H Xin and A Louri, Int. 56th Midwest Symposium on Circuits and Systems – MWSCAS’56, Boston, MA, USA, pp.100-103, 6-9 Aug 2017.
  16. “mm-Wave Tunable Colpitts Oscillators Based on FinFETs”,  Y Kelestemur, S Laha, S Kaya, A Kodi, Hao Xin and Ahmed Louri,  IEEE 18th  Wireless and Microwave Technology Conference (WAMICON), Orlando, FL, USA, pp. 24-25, April 2017.
  17. “Exploring Wireless Technology for Off-Chip Memory Access”, A. I. Sikder, A. Kodi, W. Rayess, D. DiTomaso, D. Matolak and S. Kaya. IEEE 24th Annual Symposium on High-Performance Interconnects (HOTI’16), pp. 92–99, Santa Clara, CA, 24-26 Aug. 2016.
  18. “Kilo-core Wireless Network-on-Chips (NoCs) Architectures”, A Kodi, Md A Sikder, D DiTomaso, S Kaya, S Laha, D Matolak and W Rayess, Proc. 2nd Int Conference on Nanoscale Computing and Communication  – NANOCOM’15, Boston, MA, USA, pp. 1-5, 21-22 September 2015.
  19. “OWN: Optical and Wireless Network-on-Chips (NoCs) for Kilo-core Architectures”, Md A Sikder, A Kodi, M Kennedy S Kaya, and, A Louri, IEEE 23rd Annual Symposium on High-Performance Interconnects – HOTi’15 , pp. 44-51, Santa Clara, CA, 26-28 Aug. 2015.
  20. “LC Oscillators in Nanoscale DG-MOSFETs”, S Laha, S Kaya, A Kodi, and D Matolak, IEEE 15th Wireless and Microwave Technology Conference (WAMICON), Tampa, FL, USA, pp. 1-5, 6 June 2014.
  21. “Dead Zone Free Power and Area Efficient Charge Pump Phase Frequency Detector in nanoscale DG-MOSFET”, S Laha and S Kaya, Int. 56th Midwest Symposium on Circuits and Systems – MWSCAS’56, Columbus, OH, USA, pp.920-923, 4-7 Aug 2013.
  22. “On Ultra-Short Wireless Interconnects for NoCs and SoCs: Bridging the ‘THz Gap”, S Kaya, S Laha, A Kodi, D Ditomaso, D Matolak and W Rayess, Int. 56th Midwest Symposium on Circuits and Systems – MWSCAS’56, Columbus, OH, USA, pp.804-808, 4-7 Aug 2013.
  23. “A 60 GHz Tunable Low Noise Amplifier in 32 nm DG MOSFET for a Wireless NoC Architecture”, S Laha, S Kaya, A Kodi, D Ditomaso and D Matolak, IEEE 14th  Wireless and Microwave Technology Conference (WAMICON), Orlando, FL, USA, pp. 1-4, April 2013.
  24. “Energy-efficient Adaptive Wireless NoCs Architecture,” D DiTomaso, A Kodi, D Matolak, S Kaya, S Laha and W Rayess, IEEE 7th International Symposium on Networks-on-Chips (NOCS), Tempe, AZ, USA, pp. 1-8, April 2013.
  25. “Micro-Structural Characterization of Asphalt Nano-Composites”, M Nazzal, Kaya, T Gunay and P Ahmedzade, 2nd International Symposium on Asphalt Pavements & Environment – ISAP, October 1-3, 2012, Fortaleza, Brazil.
  26. “The Use of Nano-Mechanics Techniques to Evaluate the Effect of WMA on The Behavior of Asphalt Binders”, M Nazzal, Kaya, Taylan Gunay and L Abu-Qtaish, 2nd International Symposium on Asphalt Pavements & Environment – ISAP, October 1-3, 2012, Fortaleza, Brazil.
  27. “Evaluation and Performance Analysis of Energy Efficient Wireless NoC Architecture”, D DiTomaso, S Laha, S Kaya, A Kodi and D Matolak, Int. 55th Midwest Symposium on Circuits and Systems – MWSCAS’55, pp.798-801, 5-8 August 2012, Boise, ID, USA.
  28. “A Closed form Memristor SPICE Model and Oscillator, I Abraham, S Kaya, G Pennington, Int. 55th Midwest Symposium on Circuits and Systems – MWSCAS’55, pp.1192–1195, 5-8 August 2012, Boise, ID, USA.
  29. M Nazzal, Kaya, and L Abu-Qtaish, “Evaluation of WMA Healing Properties Using Atomic Force Microscopy”, 7th RILEM International Conference on Cracking in Pavements, Delft, the Netherlands, Jun 20–22 June, 2012.
  30. “Energy-Efficient Modulation for a Wireless Network-on-Chip Architecture” D DiTomaso, S Laha, S Kaya, D Matolak and A K Kodi 10th IEEE International NEWCAS Conference, – NEWCAS’10, Montreal, Canada, June 17-20, 2012.
  31. “Optimum Biasing and Design of High Performance Double Gate MOSFET RF Mixers”, S. Laha, M. Lorek and S Kaya, International Symposium on Circuits and Systems – ISCAS, 20-23 May 2012, Seoul, Korea.
  32. “Double Gate MOSFET Based Efficient Wide Band Tunable Power Amplifiers”, S Laha, S Kaya, A Kodi and D Matolak, 13th Wireless Microwave Technology Conference – WAMICON, 15-17 April 2012, Cocoa Beach, FL, USA.
  33. “iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture,” D DiTomaso, A Kodi, S Kaya, D Matolak, IEEE 19th Annual Symposium on High Performance Interconnects – HOTI, pp.11-18, 24-26 Aug. 2011, Santa Clara, USA.
  34. “On Tunable Compact Analog Circuits with Nanoscale DG-MOSFETs“, S Kaya and H F A Hamed, Int. 53rd Midwest Symposium on Circuits and Systems – MWSCAS’53 1-4 August 2010, Seattle, WA, USA.
  35. “Studies of Ni and Co doped amorphous AlN for magneto-optical applications”, W. M. Jadwisienczak, H. Tanaka, M. Kordesch, A. Khan, Kaya, R. V. Vuppuluri, MRS Fall 2009, Nov 30-Dec 4, Boston, MA, USA
  36. “A Novel Voltage-Controlled Ring Oscillator Based on Nanoscale DG-MOSFETs”, S Kaya & A Kulkarni, 20th IEEE Int. Conf. on Microelectronics – ICM’08, 14-17 December 2008, Dubai, UAE.
  37. “Low-Voltage Tunable Double-Gate MOSFET Transconductor for VHF/UHF Continuous-Time Filters”, H F A Hamed and S Kaya, 19th IEEE Int. Conf. on Microelectronics – ICM’07 29-31 December 2007, Cairo Egypt.
  38. “Low-power tunable nanocircuits with DG-MOSFETs for current sensing applications, S Kaya and H F A Hamed, SPIE Prooceedings 6769 – Nanosensing: Materials, Devices, and Systems III, 9-12 September 2007, Boston, MA, USA
  39. “Low Voltage Programmable Double-Gate MOSFETs Current Mirror and its As Programmable-Gain Current Amplifier”, H F A Hamed, S Kaya, 14th IEEE Int. Conference on Electronics, Circuits and Systems – ICECS’07, 11-14 December, 2007, Marrakech, Morocco.
  40. “Models, Electrostatics and Molecular Dynamics of the Na+/K+-ATPase”, J F Fonseca, R F Rakowski and S Kaya, Ohio Collaborative Conference on Bioinformatics – OCCBIO 2006, 28-30 Jun 2006, Athens, OH, USA. http://www.occbio.org
  41. “A Novel Single-Gated Strained CMOS Architecture: COSMOS”, A Al-Ahmadi and S Kaya, Conference on Simulation of Semiconductor Process and Devices – SISPAD, 1-3 Sep 2005, Tokyo, Japan.
  42. “Study of RF Performance for Graded-Channel SOI MOSFETs”, W Ma and S Kaya, Conference on Simulation of Semiconductor Process and Devices – SISPAD, 1-2 Sep 2005, Tokyo, Japan.
  43. “Scaling of RF Linearity in DG and SOI MOSFETs”, W Ma, S Kaya, and A Asenov, 11th IEEE Int. Symposium on Electron Devices for Microwave and Optoelectronic Applications – EDMO, 17-18 Nov 2003, Orlando, FL, USA.
  44. “Enhanced Velocity Overshoot and Transconductance in Si/Si0.64Ge0.36/Si p-MOSFETs – Predictions for Deep Submicron Devices”, M Palmer, G Braithwaite, M J prest, T E Whall, E H C Parker, Y P Zhao, S Kaya, J R Watling, A Asenov, J R Barker,A Waite and A G R Evans , of 31st European Solid-state Device Research Conference – ESSDERC, 11-13 Sep 2001, Nunberg, Germany.
  45. “Analysis of Statistical Fluctuations due to Line Edge Roughness in sub-0.1mm MOSFETs”, S Kaya, A R Brown, A Asenov, D Magot and T Linton, Int. Conference on Simulation of Semiconductor Process and Devices – SISPAD, 5-8 Sep 2001, Athens, Greece.
  46. “Single stage amplifiers on a CMOS grade silicon substrate using a polymer interlayer dielectric with strained silicon MOSFETs” G Ternent, D L Edgar, E H McLelland, F Williamson, N Ferguson, S Kaya, C D W Wilkinson, I G Thayne, K Fobelets, J Hampson, Asia-Pacific Microwave Conference, p.767, 3-6 Dec 2000, Sydney, Australia.
  47. “Indication of Non-equilibrium Transport in SiGe p-MOSFETs” Y P Zhao, S Kaya, J R Watling, A Asenov, J R Barker, M Palmer, G Braithwaite, T E Whall, E H C Parker, A Waite and A G R Evans, of 30th European Solid-state Device Research Conference – ESSDERC, p.224, 11-13 Sep 2000, Cork, Ireland.
  48. “Metal Gate Strained Silicon SiGe MOSFETs for Microwave Integrated Circuits”, G Ternent, D L Edgar, H McLelland, S Ferguson, S Kaya, C D W Wilkinson, I G Thayne, K Fobelets and J HAmpson, 8th IEEE Int. Symposium on Electron Devices for Microwave and Optoelectronic Applications – EDMO, 13-14 Nov 2000, Glasgow, Scotland.
  49. “Effect of Oxide Interface Roughness on the Threshold Voltage Fluctuations in Decanano MOSFETs with Ultrathin Gate Oxides” A Asenov and S Kaya, Conference on Simulation of Semiconductor Process and Devices – SISPAD, 5-8 Sep 2000, Seattle, WA, USA.
  50. “RF Analysis Methodology for Si and SiGe FETs Based on Transient Monte Carlo Simulation”, S Roy, S Kaya, A Asenov and J R Barker, Conference on Simulation of Semiconductor Process and Devices – SISPAD, 6-8 Sep 1999, Kyoto, Japan.

 

CONFERENCE POSTERS & TALKS – ABSTRACTS ONLY

  1. “Ultra-Durable and Reliable High-k Textile Capacitors for Wearables and Robotics”, A Rohit, Y Kelestemur, S Kaya, P Rajan, Device Research Conference (DRC), p.1-2, 2020
  2. “Fluorinated Terpolymer Thin Films Treated By Solvent And Non-Solvent Vapour Annealing,”, S. Ok, J. Sheets, S. Welch, Kaya, A. Jalilov and D. R. Cole, 35th Romanian Chemistry Conference, October 2-5, 2018, Călimăneşti-Căciulata, Vâlcea, Romania,
  3. “Low-Cost Organic Micro-Lens Arrays for Solar Cells & LEDs: UV-C patterned PMMA and Capillary Deposited PDMS”, D Carbaugh, A Rohit, T Holeman, S Kaya, P Rajan, J Wright and W Jadwisienczak, 11th International Symposium on Flexible Organic Electronics (ISFOE18), June 28-July 4, 2018, Thessaloniki, Greece.
  4. “Conductive Properties of Laser-Scribed Polyimide Films: Optimization for Optimal Dose and Reliability”, T Cai, A Yachnes S Kaya, and W Jadwisienczak, 11th International Symposium on Flexible Organic Electronics (ISFOE18), June 28-July 4, 2018, Thessaloniki, Greece.
  5. “Novel Photolithographic Techniques Using Polymethyl Methacrylate,”, D. Carbaugh, F. Rahman, S. Pandya, Kaya, 2017 Electronic Materials Conference (59th EMC), June 28, 2017, South Bend, IN, USA.
  6. “Systematic Approach for Printing Solar Cells from Perovskite Precursors”, T Holeman, W Jadwisienczak, J Chen, S Kaya, J T Wright, 2017 Electronic Materials Conference (59th EMC), June 28, 2017, South Bend, IN, USA.
  7. “Low Cost Multiscale Patterning Via Photo-Initiated PMMA for Thin Film Devices”, D J Carbaugh, F Rahman and S Kaya, 2nd International Workshop On Thin-Films For Electronics, Electro-Optics, Energy And Sensors (TFE3S), June 24-25, 2017, Dayton, OH, USA.
  8. “Study of Printed Interdigitated Capacitors as Thermometers for Microfluidic Devices,” P Rajan, J T Wright, A Rohit, T Cai and S Kaya, 2nd International Workshop On Thin-Films For Electronics, Electro-Optics, Energy And Sensors (TFE3S), June 24-25, 2017, Dayton, OH, USA.
  9. “Plasma assisted optimization of grain size and interface properties in thin film organic transistors,”, J T Wright, P Rajan, A Rohit, T Cai, F Rahman and S Kaya, 2nd International Workshop On Thin-Films For Electronics, Electro-Optics, Energy And Sensors (TFE3S), June 24-25, 2017, Dayton, OH, USA.
  10. “Tuning hydrophobicity of a fluorinated terpolymer in differently assembled thin films”, S Ok, J Sheets, S Welch, S Kaya, A Jalilov, D R. Cole, 66th Society of Polymer Science, Japan (SPSJ) Annual Meeting, 29-31 May 2017, Chiba-city, Japan.
  11. “Tuning hydrophobicity of a fluorinated terpolymer in differently assembled thin films”, S Ok, J Sheets, S Welch, S Kaya, A Jalilov, D R. Cole, 5th Symposium Frontiers in Polymer Science,17-19 May 2017, Seville, Spain.
  12. Photochemical Modification of Polymethyl Methacrylate (PMMA) for Producing Topographic and Refractive Index Contrast for Device Fabrication”, D. J. Carbaugh, F. Rahman, J. T. Wright, P. Rajan, A. Rohit, and S Kaya, Conference on Lasers and Electro-Optics, 5–10 June 2016, San Jose, CA, USA.
  13. “Electrospun Fibrous Polymer Films and Nanostructures for Nano-Biosensing”, S Kaya, J Wright, F Rahman and W Jadwisienczak, 2nd Conference on Surfaces, Coatings and Nanostructured Materials – Asia (NANOSMAT-Asia), 25-27 March 2015, Kayseri, Turkey.
  14. “Use of Plasma Activation for Self-Assembly and Nanoink Printing”, S Kaya, P Rajan, F Rahman and W Jadwisienczak 2nd Conference on Surfaces, Coatings and Nanostructured Materials – Asia (NANOSMAT-Asia), 25-27 March 2015, Kayseri, Turkey.
  15. “A Comparative Study of Electrospun Polymers and Fibrous Films for Nanosensing”, S Kaya, J Wright, F Rahman and W Jadwisienczak, Nanoscience & Nanotechnology For Next Generation – NanoNG2014, 20-22 August 2014, Elazig, Turkey.
  16. “Plasma Activation for Self Assembly and Nanoink Printing”, S Kaya, P Rajan, F Rahman and W Jadwisienczak, Nanoscience & Nanotechnology For Next Generation – NanoNG2014, 20-22 August 2014, Elazig, Turkey.
  17. “Stability Criterion of LC Oscillators in nanoscale DG-MOSFETs”, S Laha and S Kaya, IEEE 7th International Semiconductor Device Research Symposium – ISDRS, 11-13 December 2013, Bethesda, MD, USA.
  18. “Plasma Activation of Si surfaces: An Easier and Safer Approach for Microsphere Lithography,” P Rajan, H Dasari, W Jadwisienczak, and S Kaya, IEEE 7th International Semiconductor Device Research Symposium – ISDRS, 11-13 December 2013, Bethesda, MD, USA.
  19. “W-band Power Amplifier in 0.15μm InGaAs pHEMT Technology with Microstrip Transmission Lines,” S Laha, S Kaya, A Kodi and D Matolak, IEEE 7th International Semiconductor Device Research Symposium – ISDRS, 11-13 December 2013, Bethesda, MD, USA.
  20. “Area Efficient 2.4 GHz Relaxation Oscillator with nanoscale DG-MOSFETs”, S Laha and S Kaya, IEEE 20th International Conference on Electronics, Circuits and Systems (ICECS), Abu Dhabi, UAE, 8-11 December 2013.
  21. “Diffusion based Memristor Compact Model”, I Abraham, S Kaya, and G Pennington, Workshop of Computational Electronics – IWCE’15, 22-25 May, Madison, WI, USA, 2012.
  22. Laha, K.C. Wijesundara, A. Kulkarni, S Kaya, Ultra-Compact Low-Power ICO/VCO Circuits with Double Gate MOSFETs, IEEE International Semiconductor Device Research Symposium – ISDRS, 7-9 Dec 2011, Washington DC, USA.
  23. “Temporal and Steric Analysis Of Ionic Permeation and Binding in Na+,K+-ATPase via Molecular Dynamic Simulations”, J E Fonseca and S Kaya, Biophysical Journal, vol.96, Issue 3, 145a. (Proceedings of Biophysical Society Meeting, 28 Feb-4Mar, 2009, Boston, MA, USA.
  24. “Highly Reconfigurable and Error Tolerant Threshold Logic Gates Based on Nanoscale DG-MOSFETs”, S Kaya, D T-Y Ting and H F A Hamed, International Semiconductor Device Research Symposium – ISDRS, 9-11 Dec 2009, Washington DC, USA.
  25. “Study of Ion-Motive ATPase Proteins for Multi-Valued Logic and Storage “J E Fonseca, K Clark, S-W Hla, R F Rakowski and S Kaya, NSF EMT Workshop, 24-25 July, 2008, Princeton, NJ, USA
  26. “Nanocircuits for Sensors and On-Chip Analog Signal Processing“, A Kulkarni and S Kaya, Conf. on Nanoscale Spectroscopy & Nanotechnology 5 – NSS5, 15-19 Jul7, 2008, Athens, OH, USA
  27. “Design of Reconfigurable Threshold Logic Using DG-MOSFETs“, S Kaya and F A Hamed, 12th Workshop of Computational Electronics – IWCE’12, 08-10 October, 2007, Amherst, MA, USA
  28. “Ion Permeation and Binding in Biomolecular Ion Pumps via Molecular Dynamics “, J E Fonseca, R F Rakowski, and S Kaya, 12th Workshop of Computational Electronics – IWCE’12, 08-10 October, 2007, Amherst, MA, USA
  29. “Reconfigurable Threshold Logic Gates with nano-scale DG-MOSFETs”, S Kaya, and H F A Hamed, Nano Giga Challenges in Electronics and Photonics, 12-14 March 2007, Phoenix, AZ, USA
  30. “Compact Tunable Current-Mode Analog Circuits Using DG-MOSFETs”, H Hamed, S Kaya, and J Starzyk, 2006 IEEE Int. SOI Conference, 2-5 October, 2006, Niagara Falls, NY, USA.
  31. “Modeling of Binding Sites and Electrostatics in the Ion-Motive Sodium Pump”, J F Fonseca, S Kaya, R F Rakowski and S Guennoun, 6th IEEE Conference on Nanotechnology – IEEENano 2006, 16-20 July, 2006, Cincinnati, OH, USA
  32. “Low-Power Tuneable Analog Circuit Blocks Based on Nanoscale Dual-Gate MOSFETs”, S Kaya, H Hamed and J Starzyk, 6th IEEE Conference on Nanotechnology – IEEE Nano 2006, 16-20 July, 2006, Cincinnati, OH, USA
  33. “Power•Delay Product in COSMOS Logic Circuits”, A Al-Ahmadi and S Kaya, 11th Workshop of Computational Electronics – IWCE’11, 25-27 May, 2006, Vienna, Austria.
  34. “Electrostatic Modeling of Ion Motive Sodium Pump”, J F Fonseca, S Kaya, and R F Rakowski, 11th Workshop of Computational Electronics – IWCE’11, 25-27 May, 2006, Vienna, Austria.
  35. “Prediction of the location of binding sites in homology models of metal and alkaline-earth ion binding proteins”, Reddy C , J F Fonseca, S Guennoun, S Kaya and R F Rakowski., Swiss Biomedical Research Meeting – USGEB , 23-24 Feb 2006, Geneva, Switzerland.
  36. “Layout and Geometry Tolerances in COSMOS”, A Al-Ahmadi and S Kaya, International Semiconductor Device Research Symposium – ISDRS, 6-9 Dec 2005, Washington DC, USA.
  37. “Study of Dual-Gate SOI MOSFETs as RF Mixers”, Swetha Varadharajan and S Kaya, International Semiconductor Device Research Symposium – ISDRS, 6-9 Dec 2005, Washington DC, USA.
  38. “Homology Study of Na,K ATPases Based on SERCA “, J F Fonseca, S Kaya and R F Rakowski, Mechanisms Of Membrane Transport – A Gordon Research Conference, 5-10 June, 2005, Tilton, New Hampshire, USA.
  39. “Device Scaling in COSMOS Architecture”, A Al-Ahmadi and S Kaya, IEEE 63rd Device Research Conference – DRC’63, 20-22 June, 2005, Santa Barbara, California, USA
  40. “Electro-Chemical Modeling Challenges of Biological Ion Pumps”, R F Rakowski, S Kaya and J F Fonseca, 10th Workshop of Computational Electronics – IWCE’10, 24-26 Oct, 2004, West Lafayette, Indiana, USA.
  41. “Search for Optimum and Scalable COSMOS”, S Kaya and A Al-Ahmadi, 10th Workshop of Computational Electronics – IWCE’10, 24-26 Oct, 2004, West Lafayette, Indiana, USA.
  42. “RF Performance of Strained SiGe pMOSFETs: Linearity and Gain”, W Ma and S Kaya, 10th Workshop of Computational Electronics – IWCE’10, 24-26 Oct, 2004, West Lafayette, Indiana, USA.
  43. “Simulation of Interface Roughness in DGMOSFETs using Non-Equilibrium Greens Functions”, J Fonseca and S Kaya, IEEE 62nd Device Research Conference – DRC’62, 21-23 June, 2004, South Bend, Indiana, USA
  44. “COSMOS: A New MOS Device Device Paradigm”, S Kaya, Silicon Nanoelectronics Workshop – VLSI Symposia,13-14 Jun 2004, Honolulu, Hawaii,USA.
  45. “Simulation of Interface Roughness in DG-MOSFETs using Non-Equilibrium Green’s Functions”, J Fonseca and S Kaya, IEEE 34th SISC, 04-06 Dec, 2003, Washington, DC.
  46. “Impact of Device Physics on DG and SOI MOSFET Linearity“, W Ma and Kaya, Int. Semiconductor Device Research Symposium – ISDRS, 10-12 Dec, 2003, Washington, DC.
  47. J Fonseca and Kaya, “Accurate Treatment of Interface Roughness in Nanoscale DGMOSFETs using Non-Equilibrium Green’s Functions”, Int. Semiconductor Device Research Symposium – ISDRS, 10-12 Dec, 2003, Washington, DC
  48. “Design of DG-MOSFETs for High Linearity Performance”, Kaya, W Ma and A.Asenov, ,IEEE Int. SOI Conference, Sep 2003, Newport Beach, California, USA.
  49. “Electro-thermal Analysis of RF Linearity in DG and SOI MOSFETs”, W Ma and Kaya, 4th OSC Graduate Student Workshop and Conference, 07-08 Aug 2003, Ohio Supercomputer Center, Columbus, Ohio, USA.
  50. “Accurate Treatment of Interface Roughness in Nanoscale MOSFETs using Non-Equilibrium Green’s Functions”, J Fonseca and Kaya, 4th OSC Graduate Student Workshop and Conference, 07-08 Aug 2003, Ohio Supercomputer Center, Columbus, Ohio, USA.
  51. “Study of RF Linearity in sub-50nm MOSFETs Using Simulations”, W Ma, Kaya and A.Asenov, , 9th Int. Workshop of Computational Electronics – IWCE’9, 26-29 May 2003, Frascati, Rome, Italy.
  52. “Breakdown of Universal Mobility due to Atomistic Interface Considerations in nano-MOSFETs”, S Kaya and A Asenov, 4th Motorola Workshop on Computational Materials and Electronics, 14-15 Nov 2002, Tempe, AZ, USA.
  53. “Breakdown of Universal Mobility Curves in sub-100nm MOSFETs”, S Kaya, A Asenov and S. Roy, Silicon Nanoelectronics Workshop – VLSI Symposia,9-10 Jun 2002, Honolulu, HI,USA.
  54. “Implications of Imperfect Interfaces and Edges in Ultra-small MOSFET Characteristics”, A Asenov, S Kaya and A R Brown, 3rd Motorola Workshop on Computational Materials and Electronics, 12-14 Nov 2001, Tempe, AZ, USA.
  55. “On the breakdown of Universal Mobility Curves: A 3D Statistical Simulation Framework”, S Kaya, A Asenov and S. Roy, 8th Workshop of Computational Electronics – IWCE’8, Oct 2001, Urbana-Champaign, IL,USA.
  56. 3D Modelling of Imperfect Interfaces and Edges in MOSFETs, S Kaya, A Brown, S. Roy and A Asenov, Quantum Transport Workshop, 17-22 June 2001, Maratea, Italy.
  57. “Statistical 3D Simulation of Line Edge roughness in Decanano MOSFETs”, A Brown, S Kaya, A Asenov, J H Davies and T. Linton, Silicon Nanoelectronics Workshop – VLSI Symposia,10-11 Jun 2001, Kyoto, Japan.
  58. “Drift Diffusion and Hydrodynamic Simulations of Si/SiGe p-MOSFETs”, Y P Zhao, J R Watling, S Kaya, A Asenov and J R Barker, 5th IUMRS Int. Conference on Advanced Materials, 13-18 Jun 1999, Beijing, China.
  59. “Monte Carlo Investigation of Optimal Device Architectures for SiGe FETs”, S Roy, S Kaya, S Babiker, A Asenov and J R Barker, 6th Workshop of Computational Electronics – IWCE 6, Oct 1998, Osaka, Japan.
  60. “Velocity Overshoot in psuedomorphic Si8Ge0.2p-MOSFET’s”, G Ansaripour, G Braithwaite, E H C Parker and T E Whall, S Kaya, Y-P Zhao, J R Watling, A Asenov, J R Barker, 8th European Heterostructure Technology Workshop, 13-15 Sep 1998, Cardiff, UK.
  61. “Strained Si/SiGe Quantum Wells and Wires on Vicinal (118) Si Substrates”, S Kaya, T J Thornton, K Fobelets, P W Green and J M Fernandez, Silicon Nanoelectronics Workshop – VLSI Symposia, 8-9 Jun 1997, Kyoto, Japan.